Semcon IP v. Amazon.com, Inc.
CLAIM CONSTRUCTION MEMORANDUM OPINION AND ORDER
Claim Construction C
The Parties’ Positions
Plaintiff submits: These terms are not limited to require either stopping the core clock or cessation of execution of instructions at all times while the frequency is changing. With respect to stopping the core clock, dependent Claim 6 of the ’708 Patent expressly requires “shutting down said clock.” This means that the frequency change recited in Claim 1, from which Claim 6 depends, does not require shutting down the clock.With respect to whether the claims allow for a frequency change while executing instructions, the claims are open ended and it would be improper to read such a negative limitation into a positive requirement for frequency change while execution is stopped. Dkt. No. 48 at 21–22.
In addition to the claims themselves, Plaintiff cites the following extrinsic evidence to support its position: Carbonell Decl. ¶¶ 61–65 (Plaintiff’s Ex. E, Dkt. No. 48-6 at 24–25).
Defendant responds: The intrinsic record is clear that the core clock and execution of instructions are both stopped for a frequency change. As explained in the Asserted Patents, the clock is shut down so that instructions cannot be executed. There is no support in the specification for allowing the clock to continue to run during a frequency change. Dkt. No. 50 at 14–16.
In addition to the claims themselves, Defendant cites the following intrinsic and extrinsic evidence to support its position: Intrinsic evidence: ’708 Patent col.6 ll.26–67; ’708 Patent File Wrapper June 29, 2007 Amendment and Response at 12 (Defendant’s Ex. F, Dkt. No. 50-7 at 13); ’627 Patent File Wrapper November 7, 2012 Response at 11 (Defendant’s Ex. E, Dkt. No. 50-6 at 12). Extrinsic evidence: Thornton Decl. ¶ 87 (Defendant’s Ex. H, Dkt. No. 50-9 at 34–35).
Plaintiff replies: These terms are distinct from the Shutting-Down-the-Clocks-in-Response to-a-Frequency-Change-Initiation terms. In these terms, there is no support for limiting the “clocks”to “core clocks” or requiring the cessation of execution of instructions for the entire time the frequency changes. Dkt. No. 53 at 11–12.
Plaintiff cites further intrinsic evidence to support its position: ’708 Patent File Wrapper June 29, 2007 Amendment and Response (Defendant’s Ex. F, Dkt. No. 50-7).
There are three issues in dispute. First, whether stopping execution of instructions during a frequency change necessarily means stopping the core clock. It does not. Second, whether the “clock” that is expressly stopped according to the claims is necessarily the core clock. It is. Third, whether the clock / execution of instructions is necessarily stopped for the entire time the frequency is changed. It is not.
Stopping execution of instructions does not necessarily require stopping the processor clock. Each of these terms fall into one of two general categories. The first category recites stopping execution of instructions for a frequency change. For example, Claim 23 recites: “processing unit that operates at  a frequency responsive to a clock signal… stopping execution of instructions in said processing unit … [and] while instruction execution is stopped, adjusting said programmable frequency generator to change the frequency.” The second category recites stopping the processor clock in order to stop execution of instructions. For example, Claim 25 of the ’708 Patent recites: “The method of claim 23 wherein said stopping comprises stopping said clock signal.” Thus, under the plain meaning of the claims, stopping execution of the instructions is distinct from stopping the clock. There is nothing in the intrinsic record to mandate that stopping execution necessarily requires stopping the processor clock. This is different from the execution of instructions during a voltage change discussed above, which the intrinsic record established requires operation of the processor clock. That executing instructions during a voltage change requires an operational processor clock does not mean that not executing instructions requires stopping the clock. While the embodiments described in the patents do in fact stop the clock for the frequency change, this is not enough to read a stopping-the-clock limitation into all claims directed to changing the frequency—especially considering that some claims express stopping the clock and others do not. See Phillips v. AWH Corp., 415 F.3d 1303, 1323 (Fed. Cir. 2005) (en banc) (“we have expressly rejected the contention that if a patent describes only a single embodiment, the claims of the patent must be construed as being limited to that embodiment”); Thorner v. Sony Comput. Entm’t Am. LLC, 669 F.3d 1362, 1366 (Fed. Cir. 2012) (“It is likewise not enough that the only embodiments, or all of the embodiments, contain a particular limitation. We do not read limitations from the specification into claims; we do not redefine words. Only the patentee can do that.”); SRI Int’l v. Matsushita Elec. Corp., 775 F.2d 1107, 1122 (Fed. Cir. 1985) (en banc) (“It is settled law that when a patent claim does not contain a certain limitation and another claim does, that limitation cannot be read into the former claim in determining either validity or infringement.”).
The “clock” expressly stopped in the claims is the “core clock.” The Court understands that the issues here are related to asserted Claims 6, 13, 19, and 22 of the ’708 Patent which each expressly require stopping the “clock.” Claim 6 states: “wherein the processor includes a clock and said changing said operating frequency further comprises: shutting down said clock.” Claim 13 states: “wherein said processor includes a clock and said changing the frequency of operation further comprises: shutting down said clock.” Claim 19, which depends from Claim 14, states: “wherein said causing adjustment comprises shutting down said clock.” Claim 22, which depends from Claim 20, states: “wherein said adjusting said programmable frequency generator comprises stopping said clock signal.” The clock or clock signal of Claims 6, 13, and 22 each expressly are the processor or processing-unit clock. For Claim 14, the clock is that provided to the ‘means for executing instructions” which the parties agree is the “processing unit 16” described in the patents. Dkt. No. 54-1 at 16–17, Agreed No. 1. Thus, as plainly stated, each clock of the claims at issue is the processor or processing-unit clock. As described above, this “processor clock” is the core clock. See also, ’061 Patent col.3 ll.20–26; ’061 Patent File Wrapper, August 3, 2004 Response at 16–17, Dkt. No. 50 12 at 17–18.
Neither the clock nor the execution of instructions is necessarily stopped for all frequency changes. The terms at issue are found in open-ended claims. Open-ended claims allow for unrecited structure or steps. See, e.g., In re Affinity Labs of Tex., LLC, 856 F.3d 902, 907 (Fed. Cir. 2017). Thus, while the claims require changing the frequency while execution of instructions is stopped (which may or may not mean the clock is stopped), the claims do not thereby necessarily preclude also changing the frequency while execution of instructions is not stopped.
Accordingly, the Court rejects Defendant’s proposals to limit the claims to require stopping the core clock in order to stop execution of instructions and to require that the execution and clock are stopped for all frequency changes. For the terms that do not include the term “clock,” the Court holds those terms to have their plain and ordinary meaning without the need for further construction. For the clock terms at issue in Claims 6, 13, 19, and 22 of the ’708 Patent, the Court hereby construes “clock” to mean “core clock” and holds that the terms otherwise have their plain and ordinary meaning without the need for further construction.
Case No. 2:18-cv-00192