Semcon IP v. Amazon.com, Inc.

CLAIM CONSTRUCTION MEMORANDUM OPINION AND ORDER

Claim Construction F

The Parties’ Positions

Plaintiff submits: As the Court held in Huawei, the meaning of “counter” is understandable without construction. A “counter” is not necessarily a “device” nor does it necessarily “count[] to a predetermined time.” The fact that an exemplary embodiment of a counter described in the Asserted Patents counts to a predetermined time does not justify limiting “counter” in the claims to one that “counts to a predetermined time.” Dkt. No. 48 at 16–17.

In addition to the claims themselves, Plaintiff cites the following extrinsic evidence to support its position: Carbonell Decl. ¶¶ 52–53 (Plaintiff’s Ex. E, Dkt. No. 48-6 at 21); Thornton Decl. ¶¶ 68–70 (Plaintiff’s Ex. F, Dkt. No. 48-7 at 27–29).

Defendant responds: As the Court explained in Huawei, the counter is used to control how long the clocks are disabled for a frequency change. This means the counter must count to a time. This is expressed in the claims in that the counter is started when the clocks are shut down and the clocks are restarted after the counter reaches a “specified value.” Further, this is how the described embodiments work—the counter measures a predetermined time to allow the frequency change to be effected. Finally, the “counter” limitation was added during prosecution and was recognized as a distinction over the prior art in that it counted to a predetermined time in order to restart the clocks. In contrast, a “plain and ordinary meaning” construction of “counter” could encompass things as diverse as a person who counts and a mechanical turnstile counter. Dkt. No. 50 at 18–20.

In addition to the claims themselves, Defendant cites the following intrinsic evidence to support its position: ’627 Patent figs.2, 4, col.5 ll.6–8, col.6 l.63 – col.7 l.2; ’627 Patent File Wrapper November 7, 2012 Response at 2–8 (Defendant’s Ex. E, Dkt. No. 50-6 at 3–9), November 23, 2012 Reasons for Allowance at 2 (Defendant’s Ex. G, Dkt. No. 50-8 at 7).

Plaintiff replies: Under its plain meaning in the context of the claims and the patents’ disclosure, a “counter” is neither a person who counts nor necessarily a device that counts to a predetermined time. Dkt. No. 53 at 8–9.

Analysis

The main issue in dispute is whether the counter of the Asserted Patents necessarily counts to a predetermined time. It does not.

In Huawei, the Court held that the “counter” of Claims 1, 10, and 16 of the ’627 Patent was not limited to one that “counts to time the phase-lock-loop relock process.” Huawei, 2017 U.S. Dist. LEXIS 108040, at *26–31. The Court there held that while the exemplary embodiment of a counter described in the ’627 Patent “is utilized to measure the time allowed for the PLL circuitry to lock to the new frequency,” the counter of the invention was not defined as one that necessarily “counts to time the phase-lock-loop relock process.” Id. at *28 (quoting ’627 Patent at col.6 ll.63–66). The Court reiterates that holding here.

The counter counts, but it does not necessarily count to a predetermined time. As described above with respect to the shutting-down-the-clocks-in-response-to-a-frequency-change-initiation terms, Claims 1, 10, and 16 recite that the shut-down clocks are “turned on” or “restarted” when a counter reaches a specified value. In Claims 1 and 10, the “processing unit” reenables the clocks “in response to the counter reaching a certain value.” Claim 16 states simply, “in response to said counter reaching a specified value, restarting said first and second clock signals.” While the restart of the clocks in each of these claims is tied to the counter reaching some predetermined value, the counter does not necessarily count to this predetermined value nor is the predetermined value necessarily a “time.” The counter of Claim 10 is expressly tied to a time: the “value” that triggers turning on the clocks is “a value corresponding to an amount of time allowed for phase-locked-loop (PLL) circuitry to lock in response to a change in frequency of said first clock signal.” The clock-restart values of Claims 1 and 16 are not expressly tied to a time. That the restart value is expressly tied to a time in one claim and not others suggests that it is not inherently a time. None of the claims require that the counter count to the value, only that once it reaches the value, the clocks are restarted. Not even the counter of the described embodiment is limited to counting to a predetermined time. Rather, it is simply “utilized to measure the time.” ’061 Patent col.6 l.61 – col.7 l.5. In fact, the patents describe that the “relock time” is stored in the “master register” and the “sequencer” restarts that clock once this period has “passed.” Id. This suggests that the clock-restart counter may count higher than the relock time and that something other than the counter may determine if the counter has reached the predetermined value. The patents also describe another counter, the “time stamp counter,” which “keep[s] track of world clock values,” suggesting that a “counter” is not inherently a device that counts to a predetermined time. Id. at col.7 ll.6–25. Ultimately, the counter of the claims does not necessarily count to a predetermined time.

While the Court does not perceive any real risk that a party or an expert may present a person or a mechanical turnstile counter as a counter of the claims, or that a jury might misunderstand the counter of the claims to encompass a person or a mechanical turnstile counter and thereby reach an incorrect conclusion on infringement or invalidity, Defendant has raised this as a dispute. The “counter” of the Asserted Patents and of the claims of the ’627 Patent is not a person or a mechanical turnstile counter. In the context of the patents, the plain meaning of “counter” is a unit, whether hardware or software, that counts.

Accordingly, the Court hereby construes “counter” to mean “hardware or software that counts.”

Case No. 2:18-cv-00192

Semcon IP v. Amazon.com, Inc.

CLAIM CONSTRUCTION MEMORANDUM OPINION AND ORDER

Claim Construction E

The Parties’ Positions

Plaintiff submits: The specific operating conditions listed in Defendant’s proposed construction are exemplary conditions described in the Asserted Patents. As exemplary embodiments, they should not be read into the claims. Dkt. No. 48 at 16.

In addition to the claims themselves, Plaintiff cites the following intrinsic and extrinsic evidence to support its position: Intrinsic evidence: ’061 Patent col.5 ll.21–29. Extrinsic evidence: Carbonell Decl. ¶¶ 47–50 (Plaintiff’s Ex. E, Dkt. No. 48-6 at 19–20).

Defendant responds: The operating conditions or characteristics of the claims are limited to those described in the Asserted Patents: operating frequency, operating voltage, operating temperature, and time the processor spends in an idle state. Specifically, the conditions do not include “instructions to be executed by the processor.” Such instructions were disclaimed as operating conditions during prosecution of the ’061 Patent. A “plain meaning” construction threatens to improperly allow operating conditions or characteristics to encompass instructions to be executed. Dkt. No. 50 at 16–18.

In addition to the claims themselves, Defendant cites the following intrinsic evidence to support its position: ’061 Patent col.2 l.67 – col.3 l.12; ’061 Patent File Wrapper September 8, 2008 Reply to Action Closing Prosecution in Inter Partes Reexamination at 2 (Defendant’s Ex. D, Dkt. No. 50-5 at 7).

Plaintiff replies: The patentee did not disclaim instructions to be executed from the scope of operating conditions. Rather, the patentee amended certain claims to include that a determination is made “independently of instructions to be executed by the processor.” This means that “instructions to be executed” are actually within the scope of “operating conditions,” else there would have been no need to amend the claims. Dkt. No. 53 at 8.

Analysis

There are two issues in dispute. First, whether the recited operating “conditions,” “characteristics,” and “parameters” of the processor are limited to those listed in the Asserted Patents. They are not. Second, whether the recited operating “conditions,” “characteristics,” and “parameters” of the processor necessarily excludes “instructions to be executed by the processor.” They do not.

The Asserted Patents’ list of operating conditions, namely, “the present frequency and voltage of operation, the temperature of operation, the amount of time the processor spends in one of what may be a number of idle states in which various components of the system are quiescent,” ’061 Patent col.5 ll.23–28, is not exhaustive. “[V]oltage and frequency monitoring” is expressly exemplary, id. at col.3 ll.2–5 (using “such as” to introduce voltage and frequency monitoring), as is monitoring of “temperature data.” Id. at col.3 ll.5–9 (using “e.g.” to introduce temperature data). Other exemplary condition monitoring includes “detecting other operations of the system including commands to be executed from which a particular type of operation to be executed may be determined.” Id. at col.3 ll.9–12 (using “including” to introduce a list of other operations detected). The patents also refer to “various operating characteristics” with reference to U.S. Patent App. No. 09/417,930. Id. at col.3 ll.12–15. Further, the patents disclose monitoring “various conditions of the processor that relate to power expenditure by the processor” which “may include …the amount of time the processor spends in one of what may be a number of idle states in which various components of the system are quiescent.” Id. at col.5 ll.21–28. Relatedly, the patents mention ramping up the frequency and voltage for a “short time,” suggesting the time of overclocking may also be an operating condition that is monitored. See id. at col.7 ll.45–58; Carbonell Decl. ¶ 49, Dkt. No. 48-6 at 20. Ultimately, the listed operating conditions/characteristics/parameters are not exhaustive as Defendant suggests.

Except as expressly provided in the claims, the “instructions to be executed by the” processor/processing device condition is not excluded from the claimed operating conditions/characteristics/parameters. Claim 1 of the ’247 Patent recites: “determining a level of permitted power consumption by a processing device from a set of operating conditions of the processing device, with the determining the level of permitted power consumption not based upon instructions to be executed by the processing device.” This expressly states that the “instructions to be executed by the processing device” are not part of the “operating conditions” used in “the determining [a] level of permitted power.” This suggests that “operating conditions” does not inherently exclude “instructions to be executed by the processing device.” Further, amending Claim 1 during prosecution of the ’061 Patent reexamination to expressly remove “instructions to be executed by the processor” from the conditions used in determining a reduced maximum power consumption level is not a broad disclaimer of “instructions to be executed by the” processor/processing device from the scope of “operating conditions” regardless of the role of those conditions in a claim.

Accordingly, the Court rejects Defendant’s proposal to limit the terms to “the present frequency and voltage of operation of the processor, the temperature of operation of the processor, or the amount of time the processor spends in one of what may be a number of idle states” and to necessarily exclude “instructions to be executed by the processor.” The Court hereby holds that the Operating-Conditions terms have their plain and ordinary meanings without the need for further construction.

Case No. 2:18-cv-00192

Semcon IP v. Amazon.com, Inc.

CLAIM CONSTRUCTION MEMORANDUM OPINION AND ORDER

Claim Construction D

The Parties’ Positions

Plaintiff submits: The plain meanings of these terms do not require that execution of instructions be stopped. Such a limitation is expressed in other claims and should not be read into Claims 1, 10, or 16 of the ’627 Patent. Further, while the terms require that clocks to the processing unit be “shut down,” other clocks may still operate and be received by the processing unit. Dkt. No. 48 at 22–23.

In addition to the claims themselves, Plaintiff cites the following extrinsic evidence to support its position: Carbonell Decl. ¶ 63 (Plaintiff’s Ex. E, Dkt. No. 48-6 at 24–25); Thornton Decl. ¶¶ 87–88 (Plaintiff’s Ex. F, Dkt. No. 48-7 at 34–36).

Defendant responds: See the Changing-the-Frequency-While-Execution-of-Instructions-is-Stopped Terms addressed above.

Plaintiff replies: Neither the ’627 Patent nor the prosecution history justify requiring shutting down the “core clock” or ceasing the execution of instructions. Dkt. No. 53 at 12.

Analysis

There are three issues in dispute. First, whether the processor “clocks” shut down in the claims necessarily include the “core clock.” They do. Second, whether shutting down the processor clock necessarily means that there are no instructions executed. It does not. Third, whether the clock is necessarily stopped for the entire time the frequency is changed. It is not.

The “clocks” of the claims at issue, Claims 1, 10, and 16 of the ’627 Patent, include the core clock. Claim 1 of the ’627 Patent recites:

a frequency generator configured to receive a first clock signal from a clock generator and to adjust a frequency of said first clock signal to furnish clock signals at different frequencies to said processing unit and said second component … wherein, in response to initiating a change in frequency for said processing unit, said processing unit is configured to start a counter and to shut down clocks to said processing unit and said second component.

Claim 10 similarly recites:

said frequency generator configured to adjust said frequency of said first clock signal to concurrently furnish clock signals at different frequencies to said processing unit and said second component … wherein, in response to initiating said change in frequency, said processing unit is configured to start a counter and to shut down clocks to said processing unit and said second component.

Claim 16 similarly recites:

a first clock signal at a first frequency to provide a second clock signal at a second frequency to a processing unit … in response to initiation of a change in frequency for said processing unit, starting a counter and stopping said first and second clock signals.

That is, the “clocks” or “clock signals” of the claims expressly include the processing-unit clock. As explained above, the processing-unit clock is the core clock. See also, ’061 Patent col.3 ll.20–26; ’061 Patent File Wrapper, August 3, 2004 Response at 16–17, Dkt. No. 50-12 at 17–18.

While, as set forth above, the Court understands that execution of instructions during a voltage change requires operation of the core clock, it does not understand the claims at issue here to preclude instructions based on other clocks. As set forth above, the patentee explained during prosecution of the ’061 Patent that execution of instructions during the voltage change means clocking instructions through the processor and that this is not possible when the processor clock is not running. ’061 Patent File Wrapper, August 3, 2004 Response at 16–17, Dkt. No. 50 12 at 17–18. Thus, claimed execution of instructions during the voltage change requires operation of the core clock. The claims at issue here, however, do not refer to either continuing to execute instructions or stopping the execution of instructions, during a voltage change or otherwise. Nor do the claims, which are open-ended, preclude the use or presence of unrecited clocks. Ultimately, the Court finds nothing in the intrinsic record to require that any and all instructions be executed only through use of the core clock. While the Court also finds no intrinsic-record disclosure of using any clock other than the core clock to execute instructions, whether such is technically possible is an issue of fact outside the patents and whether a claim to such undisclosed clock is supported by the disclosure of the Asserted Patents is an issue of invalidity under the enablement or written-description requirements, not an issue of claim construction. Phillips v. AWH Corp., 415 F.3d 1303, 1327 (Fed. Cir. 2005) (en banc) (“we have certainly not endorsed a regime in which validity analysis is a regular component of claim construction”).

The terms at issue do not require that the clocks are necessarily shut down for the entire frequency-change operation. The claims themselves recite when the shut-down clocks are reenabled. For instance, Claim 10 recites:

processing unit configured to register a value corresponding to an amount of time allowed for phase-locked-loop (PLL) circuitry to lock in response to a change in frequency of said first clock signal … a frequency generator coupled to said clock generator and comprising said PLL circuitry, said frequency generator configured to adjust said frequency of said first clock signal to concurrently furnish clock signals at different frequencies to said processing unit and said second component … in response to initiating said change in frequency, said processing unit is configured to start a counter and to shut down clocks to said processing unit and second component … in response to said counter reaching said value, said processing unit is configured to tum on said clocks.

The claim expressly recites that the clocks are shut down for a sufficient period of time to allow the phase-locked-loop circuitry to lock in in response to a change in frequency. Claims 1 and 16 are different. Claim 1 recites: “in response to said counter reaching a specified value, said processing unit is configured to turn on said clocks.” Claim 16 recites: “in response to said counter reaching a specified value, restarting said first and second clock signals.” Unlike Claim 10, Claims 1 and 16 are silent on how or whether the “specified value” is related to the duration of the frequency change. While the Court finds no intrinsic-record disclosure of a specified value other than one “used to measure the time allowed for the phase-lock-loop circuitry to lock to the new frequency,” ’061 Patent col.6 ll.63–66, whether the disclosure of the Asserted Patents supports a claim to such is an issue of invalidity under the enablement or written-description requirements, not an issue of claim construction. Ultimately, the Court finds nothing in the intrinsic record that mandates the clocks be shut down for the entirety of the frequency change.

Accordingly, the Court rejects Defendant’s proposals to limit the claims to prohibit execution of instructions other than those enabled by the core clock and to limit the claims to prohibit an enabled core clock at any point during a frequency-change operation. The Court hereby construes the “clock signal” terms as set forth below, and holds that the shutting-down-the-clocks-in-response-to-a-frequency-change-initiation terms otherwise have their plain and ordinary meaning without the need for further construction:

• In Claims 1 and 10 of the ’627 Patent, “in response to initiating [a/said] change in frequency … shut down clocks to said processing unit and said second component” means “in response to initiating [a/said] change in frequency … shut down clocks, including the core clock, to said processing unit and said second component”; and

• In Claim 16 of the ’627 Patent, “in response to initiation of a change in frequency for said processing unit … stopping said first and second clock signals” means “in response to initiation of a change in frequency for said processing unit … stopping said first and second clock signals, including the core clock.”

Case No. 2:18-cv-00192